Lee, HHK 2011Inan, US, Lee, HHK Circuit and Layout Techniques for Soft-Error-Resilient Digital CMOS Circuits PDF (Online Viewing) Kelin_thesis.pdf Linscott, IR, Relangi, P, Bounasser, M, Lilja, K, Mitra, S, Lee, HHK Design of a Sequential Logic Cell Using LEAP: Layout Design Through Error Aware Transistor Positioning