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  • Lee, HHK

Lee, HHK

2011

Inan, US, Lee, HHK
Circuit and Layout Techniques for Soft-Error-Resilient Digital CMOS Circuits
PDF (Online Viewing) Kelin_thesis.pdf

Linscott, IR, Relangi, P, Bounasser, M, Lilja, K, Mitra, S, Lee, HHK
Design of a Sequential Logic Cell Using LEAP: Layout Design Through Error Aware Transistor Positioning

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